1. Field of the Invention
The present invention relates generally to methods for fabricating microelectronic products. More particularly, the present invention relates to chemical vapor deposition (CVD) methods for fabricating microelectronic products.
2. Description of the Related Art
Common in the microelectronic product fabrication art is the use of chemical vapor deposition (CVD) methods for forming microelectronic layers. CVD methods are desirable in the microelectronic product fabrication art insofar as CVD methods are generally readily adaptable for forming microelectronic layers of various microelectronic materials.
As microelectronic fabrication methodology has evolved CVD methods have also evolved to include a sub-class known as digital CVD methods. Digital CVD methods employ a sequential and separate pulsing of reactant materials, rather than a co-deposition of reactant materials, so that microelectronic material layers may be formed with enhanced compositional and dimensional control. Included among digital CVD methods are atomic layer chemical vapor deposition (ALCVD) methods where a pulsing is intended to form or react a single atomic layer of reactant material.
While digital CVD methods, such as ALCVD methods, are thus desirable and often essential in the microelectronic product fabrication art, digital CVD methods, and in particular ALCVD methods, are nonetheless not entirely without problems. In that regard, ALCVD methods are not always optimally manufacturable insofar as ALCVD methods require precise control of timing of introduction of multiple reactant materials into a CVD reactor chamber.
It is thus desirable in the microelectronic product fabrication art to provide ALCVD methods with enhanced manufacturability.
It is towards the foregoing object that the present invention is directed.
Various microelectronic products, and CVD methods for fabrication thereof, have been disclosed in the microelectronic product fabrication art.
Included but not limiting among the microelectronic products and CVD methods are those disclosed within: (1) Gousev et al., in U.S. Pat. No. 6,287,897 (a high dielectric constant gate dielectric layer with self forming barrier layer as may be formed employing an ALCVD method and employed within a field effect transistor (FET) device); and (2) Ma et al., in U.S. Pat. No. 6,297,539 (another high dielectric constant gate dielectric layer as may be formed employing an ALCVD method and employed within an FET device).
The teachings of each of the foregoing references are incorporated herein fully by reference.
Desirable in the microelectronic product fabrication art are additional ALCVD methods with enhanced manufacturability.
It is towards the foregoing object that the present invention is directed.
A first object of the invention is to provide an ALCVD method for forming a microelectronic layer.
A second object of the invention is to provide am ALCVD method in accord with the first object of the invention, wherein the microelectronic layer is formed with enhanced manufacturability.
In accord with the objects of the invention, the invention provides a CVD method for forming a microelectronic layer.
To practice the method of the invention, there is first provided a substrate. There is then treated the substrate with a wetting material to provide a wettable substrate. There is then formed upon the wettable substrate a first reactant material layer. Finally, there is then treated the first reactant material layer with a second reactant material to form a reacted material layer.
The present invention provides a CVD method for forming a microelectronic layer, wherein the microelectronic layer is formed with enhanced manufacturability.
The present invention realizes the foregoing object by incorporating within the CVD method a wetting material treatment of a substrate to form a wettable substrate prior to forming upon the wettable substrate a microelectronic layer while employing the CVD method. By employing the wetting material treatment, the microelectronic layer is formed with enhanced manufacturability insofar as there is attenuated or avoided a variable incubation or induction time for sorption of a reactant material upon the substrate.